1. Field
Example embodiments relate to a nonvolatile memory device and method of manufacturing the same, for example, a nonvolatile memory device including an amorphous alloy metal oxide layer.
2. Description of the Related Art
In recent years, research has been conducted with respect to semiconductor memory devices that may increase the number of memory cells per area, for example, that may have higher integration density, increased operating speed, and/or may be driven by lower power.
In general, semiconductor memory devices may include a plurality of memory cells that are connected via circuits. For example, in a dynamic random access memory (DRAM), a unit memory cell may include one switch and one capacitor. Such a DRAM may have the advantage of higher integration density and higher operating speed. However, when power supply is cut off, the DRAM may lose all stored data.
Nonvolatile memory devices, for example, flash memory devices, may retain stored data even if the power supply is abruptly interrupted. Flash memory devices may have a nonvolatile characteristic, but flash memory devices may have lower integration density and slower operating speed than volatile memory devices.
For example, other nonvolatile memory devices being researched may include magnetic random access memory (MRAM) devices, ferroelectric random access memory (FRAM) devices, phase-change random access memory (PRAM) devices, and resistance random access memory (RRAM) devices.
RRAM devices may have a variable resistance characteristic such that resistance of transition metal oxide (TMO) may vary according to a voltage.
FIG. 1A illustrates a structure of a RRAM device that may use a variable resistance material having a conventional structure. Referring to FIG. 1A, the RRAM device may include a substrate 10, a lower electrode 12, an oxide layer 14, and/or an upper electrode 16, which may be sequentially stacked. The lower electrode 12 and the upper electrode 16 may be formed of a conventional conductive material. The oxide layer 14 may be formed of TMO having the variable resistance characteristic. For example, the oxide layer 14 can be formed of ZnO, TiO2, Nb2O5, ZrO2, or NiO.
A Perovskite-RRAM device may use Perovskite oxide as a switching material group, PCMO (PrCaMnO3) or Cr—STO (SrTiO3) as an oxide layer, and may realize a memory characteristic according to a polarity applied to a memory node using a principle of Schottky barrier deformation.
The RRAM device using the TMO may have a switching characteristic that may allow it to act as a memory device. However, a crystalline thin film memory device using the TMO may be restricted to a micro-node.
FIG. 2A is a graph illustrating crystallization of ZnO, which is a TMO, formed on a Si substrate using X-ray diffraction (XRD). Referring to FIG. 2A, a Si (100) peak, a ZnO (0002) peak, and a ZnO (10-12) peak may show a process of crystallization of ZnO.
FIG. 2B is a scanning electron microscopy (SEM) photograph of the surface of ZnO, the crystallization of which is illustrated in the graph in FIG. 2A. Referring to FIG. 2B, when the oxide layer 14 of the RRAM device is crystallized, it may be difficult to realize a memory device having a uniform characteristic because grains may be large.